on the article · Technology

Marvell’s AI memory bet is about sockets, not chips

Marvell is chasing custom memory controllers for AI servers — a smaller market than GPUs, but one with better margins.

By The Signal · · 6 min read

A custom memory socket for AI chips sits empty, awaiting its stack.
A custom memory socket for AI chips sits empty, awaiting its stack. — on the article

Marvell Technology does not make the chips that run AI models. It makes the wiring between them — specifically, the custom silicon that lets a processor talk to memory faster than an off-the-shelf controller allows. That distinction, buried in a Yahoo Finance valuation note this week, is the whole story: Marvell's stock case now rests on a part of the AI server nobody outside chip design ever names.

What actually happened

Marvell has spent the past two years building custom memory and interconnect silicon for hyperscale customers — the cloud operators building their own AI accelerators rather than buying Nvidia's. The company doesn't disclose exact contract values, but it has said its custom compute and connectivity business, which includes this memory work, is on pace for several billion dollars in annual revenue by fiscal 2026, a figure it first outlined at its April 2024 investor day and has reaffirmed since. The financial press treats this as a "narrative" because Marvell trades on a story about future contracts more than on current earnings — the company's data center revenue was $1.5 billion in its fiscal second quarter of 2025, up from $881 million a year earlier, but the stock's valuation multiple assumes a much larger business arrives later.

The specific product getting attention is custom HBM (High Bandwidth Memory) controller and interface silicon — the circuitry that sits between a processor and its memory stacks, tuned to a single customer's chip design rather than sold as a general-purpose part. Amazon Web Services and Microsoft, both building their own AI training chips, are the customers most often named in analyst notes, though neither company confirms supplier details publicly.

Who pays, who gains

Cloud operators pay for custom memory silicon because it saves them from buying it embedded in someone else's GPU. Nvidia's H100 and its successors bundle compute and memory-interface logic into one part; a company like Amazon, designing its own Trainium chips, needs someone to supply just the memory half. Marvell charges a premium for that customization — industry estimates put custom silicon gross margins in the 60-65% range, roughly in line with Marvell's overall corporate gross margin of 61% reported in its most recent quarter, though the company doesn't break out margins by product line.

Marvell gains a business less exposed to Nvidia's pricing power, but it's a smaller pond. The custom AI silicon market — memory controllers, interconnect chips, and application-specific accelerators built for individual cloud companies — was estimated by Marvell itself at $16 billion in 2023, growing toward $75 billion by 2028. That's real growth, but it's a fraction of the roughly $190 billion analysts expect the broader AI chip market to reach by the same year, most of which still flows to Nvidia and, increasingly, AMD.

Shareholders pay in a different sense: through multiple compression risk. Marvell trades at a forward price-to-earnings ratio that has swung between roughly 25 and 45 times over the past year, largely on sentiment about whether hyperscaler custom-chip programs will scale as promised or get delayed, as Amazon's Trainium2 rollout reportedly was in parts of 2024.

The mechanism

Think of an AI chip like a printing press and its memory like the paper feed. A generic printing press pulls paper at a fixed rate, fine for most jobs. But if you're running a press that needs to pull paper faster than any standard feed mechanism allows — because the press itself is custom-built for one enormous, repetitive job — you need someone to engineer a custom feed system matched to that exact press. That's what Marvell sells: not the press, not the paper, but the feed mechanism tuned to a specific machine.

Concretely, this means designing the physical and logical interface — called a memory controller — that connects a processor's compute logic to HBM memory stacks sitting next to it on the same package. HBM itself is manufactured by SK Hynix, Samsung, and Micron; Marvell doesn't make the memory chips. It makes the interface silicon that determines how efficiently a processor can pull data from that memory, measured in gigabytes per second of bandwidth and nanoseconds of latency. For AI training workloads, memory bandwidth is often the actual bottleneck, not raw compute — a chip can sit idle waiting for data even if its math units are fast, the same way a press sits idle waiting for paper no matter how fast it could print.

Because each hyperscaler's processor design is different, the memory interface has to be custom-engineered for each one — hence "custom silicon" rather than a catalog part. That customization is Marvell's moat and its risk simultaneously: winning a design slot on Amazon's next Trainium generation means a multi-year revenue stream, but losing one, or having a customer's chip program slip a generation, means the investment doesn't pay back on schedule.

What happens next

Three things are checkable over the next two reporting cycles. First, whether Marvell's data center segment — the line item that captures this custom silicon revenue — keeps growing sequentially; it rose from $1.63 billion to $1.5 billion between its fiscal Q1 and Q2 2025 reports on a mixed quarter, and the next print will show whether hyperscaler capital spending plans, which Microsoft, Amazon, and Google have all guided upward for 2025, are translating into actual Marvell orders. Second, whether AMD or Broadcom — Marvell's closest rivals in custom AI silicon, with Broadcom notably supplying Google's TPU chips — take share in new hyperscaler design wins announced this year. Third, whether HBM supply itself remains the constraint: SK Hynix and Samsung have both said their 2025 HBM output is largely sold out, which means even a fully engineered Marvell interface is only as useful as the memory chips available to pair it with.

The scenario that would break the narrative isn't Marvell losing a customer — it's a hyperscaler deciding the custom-chip program itself isn't worth the engineering overhead and reverting to off-the-shelf GPUs, which happened, briefly, with parts of Meta's internal chip effort in 2023 before the company recommitted. That's the risk nobody in the valuation notes prices explicitly: the willingness of a handful of cloud companies to keep funding their own chip programs, year over year, is doing more to set Marvell's revenue than anything Marvell itself controls.

FAQ

Is Marvell an AI chip company like Nvidia? No. Nvidia sells complete GPU systems for AI training and inference. Marvell sells component-level custom silicon — memory interfaces, networking chips, interconnect — that goes inside systems designed by its customers, including systems that compete with Nvidia's.

Why does memory bandwidth matter more than raw processing speed? Modern AI models require moving enormous amounts of data between memory and compute during both training and inference. If the interface between them can't keep pace with the processor's math units, those units sit idle waiting for data, which is why hyperscalers pay for custom-tuned memory interfaces rather than generic ones.

Who are Marvell's actual customers? The company doesn't name them in earnings calls, citing customer confidentiality agreements, but analyst reports and supply-chain research consistently point to Amazon Web Services and Microsoft as the largest custom silicon partners, with Google identified more often as a Broadcom customer for its TPU line.